Home > News > GaN assembly resources

GaN assembly resources

wallpapers News 2021-11-19
GaN assembly resources
Egan FETs enable a new state-of-the-art in power conversion efficiency. One of the contributors to this new performance benchmark is that these FETs are in chip-scale Land Grid Array (LGA) and Ball Grid Array (BGA) packages. The format of these packages reduces board space, stray inductance, and parasitic resistance. The following resources discuss how to reliably mount these packages onto a printed circuit board.
A well-orchestrated PCB design and assembly plan are required to successfully implement techniques such as underfill in next-generation OEM embedded consumer and mobile designs. Two distinct market sectors in embedded systems are driving a trend to ever-smaller components that do more, do it more reliably, and do it while withstanding harsh conditions. In the consumer sector, both smaller size and increased functional densities are required for handheld, mobile, and portable systems, such as smartphones and tablets. In mil/aero portable electronics–such as satellites; unmanned aerial, undersea, and ground vehicles; and handheld, manpack, and small-form-factor battery-operated systems–ultra-reliability combined with the ability to withstand extreme temperatures and other environmental stresses are required in addition to greater functionality and reduced form factors. Thus OEMs face ever-growing requirements for greater chip functionality, reduced size, mechanical toughness, and high reliability. To achieve a smaller size, micro ball-grid arrays (BGAs) and chip-scale packaging (CSP) are typical solutions (see Figure 1 for size comparisons). However, these smaller form factors mean greater design and assembly challenges, including extremely short solder joints and the requirement for greater stress relaxation for thermal stress. In a fine-pitch micro BGA, for instance, that pitch is at 0.3 millimeters (mm) and is rapidly moving to 0.25 mm. With the pitch decreasing, ball size is reduced. Consequently, the standoff height between the printed circuit board (PCB) and chip package is decreased. The shorter standoff height reduces PCB-level reliability. Hence, fine-pitch micro CSPs and micro BGAs have difficulty meeting mechanical shock and substrate flexing tests for portable electronics applications. Underfill is a polymer or liquid applied on the PCB after it has been subjected to reflow. Underfill encapsulates the bottom side of the silicon chip. The term “encapsulates” in PCB assembly parlance usually means covering the top surface of a device where fragile interconnects are located. But when speaking of underfill, encapsulate means to cover the fragile interconnects between the chip's bottom side and the PCB's top side (as shown in Figure 2 ). When underfill is used, mounting conventional CSP and BGA packaging onto the board using conventional assembly steps and techniques usually produces sound mechanical and thermal properties.
 

Say something
  • All comments(0)
    No comment yet. Please say something!
Tag: GaN   GaN resources